Good morning. I’m sending this early Saturday because Monday I’ll be at GTC and the pace won’t slow down until Friday. The world feels chaotic right now. But the AI infrastructure buildout doesn’t pause for macro uncertainty, and the companies locking in multi-year capacity commitments with customer prepayments are telling you exactly how confident they are in the demand trajectory.
At the end of The Quiet Architect, I wrote: “There’s also a foundry layer underneath all of this that most investors haven’t identified yet. The silicon photonics chips inside every optical engine, every 1.6T transceiver, every CPO module have to be fabricated somewhere. That story is coming next, for paid subscribers.”
This is that story.
Every layer of the optical interconnect thesis we’ve been building at BEP Research, from Lumentum’s laser dominance to Credo’s AEC ramp to NVIDIA’s $4 billion photonic investment, all share a common dependency that most investors haven’t fully mapped. Someone has to fabricate the silicon photonics chips. The Photonic Integrated Circuits inside optical transceivers, the SiPho engines going into CPO modules, the 1.6T optical engines that NVIDIA just contracted for its next-generation networking architecture. All of them need a foundry with mature SiPho process technology, available capacity, and the willingness to prioritize photonics as a core business. Not a side project. Not a research line buried inside a $70 billion revenue giant. A core business.
That foundry is Tower Semiconductor.
From Broke to Billions
When Russell Ellwanger took over as CEO in May 2005, Tower was essentially insolvent: $550 million in debt on $100 million in annual revenue. He brought two decades of semiconductor manufacturing experience from Applied Materials, Novellus Systems, and Philips Semiconductors, with stints in Israel, Japan, Singapore, and the Netherlands. Over twenty years, he methodically rebuilt Tower by acquiring underutilized fabs (Newport Beach from Jazz Semiconductor, two in Japan through TPSCo, a 300mm line in Italy shared with STMicroelectronics) and filling them with specialty analog processes the leading-edge foundries didn’t want: RF, power management, CMOS image sensors, SiGe BiCMOS, and eventually silicon photonics.
In 2022, Intel agreed to acquire Tower for $5.4 billion. Chinese regulators blocked the deal. Tower pocketed a $350 million breakup fee and went right back to executing. Three years later, most employees view the failed acquisition as the best thing that ever happened to them. The stock has rocketed approximately 244% since its April 2025 low.
Ellwanger still eats in the company cafeteria in Migdal HaEmek. On a recent visit, he asked two employees how they felt. Their answer: “Look at the stock price. I come home in the evening and my whole family, even my neighbors, talk to me about Tower stock.” That’s the vibe at a company where most employees hold shares and the CEO has been in the seat for twenty years. Execution risk is real on a 5x capacity ramp. But if any management team can pull it off, it’s this one.
Q4 2025: total revenue of $440 million (+14% YoY, +11% sequentially). Net profit of $80 million (+49% sequentially). Full year revenue of $1.566 billion. But the number that matters: Silicon Photonics revenue of $228 million in 2025, up 115% year-over-year, with an annualized run rate exceeding $360 million exiting the year. SiPho went from a niche offering to Tower’s primary growth engine in twelve months.
The Capacity Bet
On the February earnings call, Ellwanger announced Tower is increasing total capex to $920 million, adding $270 million on top of the previously announced $650 million. The target: 5x SiPho wafer capacity by year-end 2026 compared to Q4 2025 levels. That’s not a forecast. That’s equipment on order.
Over 70% of projected SiPho capacity through 2028 is already reserved or in the pre-booking stage, backed by customer prepayments. When customers put money down years in advance to secure foundry capacity, that’s committed purchase agreements from companies that cannot afford to lose their place in line during the 1.6T transition.
This capex commitment exceeds every SiPho competitor globally except TSMC. And TSMC’s SiPho capacity is a rounding error in their overall business. Tower has made Silicon Photonics its strategic centerpiece.
Why This Connects to Everything
The diagram above maps what I’ve been building across six months of coverage: a six-layer stack from raw materials through system integration, with Tower at Layer 2, the foundry layer every other layer depends on.
The Optical Interconnect Boom (December). When I mapped the full optical technology stack, I described Layer 2 as where optical components get fabricated on silicon wafers. What I didn’t explore deeply enough was the SiPho foundry landscape: the companies fabricating photonic chips for everyone else. Tower is that foundry.
The Great Photonic Divergence (February 27). Lumentum’s $665.5 million record quarter was driven by InP EML laser dominance. But a laser is only half the equation. The optical engine that modulates and routes that light is built on a SiPho PIC. Lumentum makes the light. Tower makes the chip that uses it.
Credo (February 9). The $406 million quarter and 18% beat confirmed interconnect demand is outrunning suppliers’ forecasts. Tower is the factory floor where the optical-eats-copper transition gets manufactured into wafers.
The Fourth Piece (February 28). In the Groq/GTC thesis, I traced NVIDIA’s optical clock-forwarding paper to a dataflow inference engine needing SiPho at production scale. NVIDIA announced a strategic partnership with Tower on February 5 for 1.6T optical engine production. That’s supply chain positioning.
The Quiet Architect (March 7). Last week’s Marvell deep dive covered NVIDIA’s $4 billion Lumentum/Coherent investment and Hock Tan’s case for copper. The key insight: Jensen and Hock Tan aren’t disagreeing about whether optical wins, they’re debating when. Tower sits at the center of both timelines, fabricating PICs for today’s pluggable transceivers and tomorrow’s CPO modules. I called the laser shortage the new CoWoS bottleneck. Tower is the manufacturing constraint one layer deeper.
The Technology Moat
The PH18 platform. The industry’s most mature 200mm SiPho process, centered at Tower’s Newport Beach fab. As someone who studied silicon photonics in Professor Fainman’s lab at UC San Diego, I can tell you it’s in one of the densest clusters of photonics expertise in the world. Full PDK support through Cadence, Synopsys, and Luceda. Multi-project wafer services for startups. Make it easy to tape out, and you become the default foundry.
The 300mm transition. Launched late 2024, optimized for 1.6T. A 300mm wafer provides over 2.25x the usable area of 200mm, delivering critical cost reduction. Low-loss silicon and silicon nitride waveguides. OSAT compatibility for wafer-level packaging.
3D heterogeneous integration. The hardest differentiator to replicate. Tower’s BSI image sensor expertise (the same technology in your smartphone camera) transfers directly to stacking Electronic ICs on top of Photonic ICs using 300mm wafer bonding. Tower can bond high-frequency SiGe BiCMOS with SiPho in a single integrated stack for CPO architectures. That’s a packaging capability most foundries simply don’t have.
The Modulator Portfolio
For 1.6T and future 3.2T networks, per-lane data rates must scale to 200G and eventually 400G. Traditional silicon modulators hit a wall at those speeds: bandwidth caps around 67-80 GHz with drive voltages that are unacceptable for CPO. Tower is positioning itself as the foundry for every alternative.
TFLN maintains electro-optic response exceeding 100 GHz with half-wave voltages below 2V. Tower processes 4-inch and 6-inch TFLN wafers and is transitioning to 8-inch. EO polymers are the newest addition: this week, Lightwave Logic announced a development agreement to integrate their modulator technology into Tower’s PH18 PDK, targeting 110 GHz+ bandwidth for 400G per lane.
Tower doesn’t bet on one modulator technology. Silicon for current gen, TFLN for ultra-high bandwidth, EO polymers for compact low-power designs. SiGe, SiPho, TFLN, and EO polymer under one roof with 3D integration to stack them. No competitor matches that portfolio. Customers choose the technology. Tower fabricates it.
The Two Camps
Camp 1: Tower Semiconductor. Specialist foundry, open platform. Largest SiPho installed base, multi-site manufacturing (Israel, U.S., Japan), five partnerships in six weeks, $920 million in capex, 70%+ capacity pre-booked through 2028.
Camp 2: TSMC COUPE. New entrant leveraging packaging dominance. SoIC 3D hybrid bonding stacks EICs on PICs. NVIDIA’s Spectrum-X and Quantum-X switches are the first COUPE products. Broadcom and Ayar Labs also adopting. Volume targeting 2026.
The tension: TSMC previously had limited SiPho presence. They’re muscling in from packaging, offering one foundry for logic, photonics, and advanced packaging. Compelling pitch. But hyperscalers like Amazon and Google don’t want to be locked into TSMC’s logic stack for photonics. They want to self-design optical engines at a foundry that prioritizes their SiPho orders above all else. At TSMC, SiPho is a rounding error. At Tower, it’s the entire growth strategy.
My read: room for both, but serving different customers. NVIDIA and Broadcom will likely use COUPE for vertically integrated solutions. Much of the rest of the ecosystem appears to flow through Tower, though dynamics will evolve as COUPE scales. GlobalFoundries trails on 1.6T timelines. Silterra, UMC, and STM trail significantly.
The $920 million capex is Tower racing to make this definitive before COUPE fully ramps
The Broadcom Tailwind
Broadcom’s open CPO platform (Bailly, 1 million hours zero-downtime at Meta) encourages third-party vendors and hyperscaler teams to tape out SiPho PICs and integrate them into Broadcom switch architectures. Those tape-outs happen at Tower.
Hock Tan classified CPO as a future technology on the FY1Q26 call, noting AI cluster scaling through 2026-2027 will prioritize pluggable modules. That’s bullish for Tower’s current platform: longer high-margin lifecycle before CPO inflects, while co-developing next-gen solutions with Broadcom in parallel. And Broadcom remains the sole 1.6T DSP supplier, ensuring Tower benefits from every 1.6T design win in the Broadcom ecosystem.
The Partnership Avalanche
Five partnerships in six weeks, each representing a different demand vector:
NVIDIA (February 5): 1.6T optical engines for next-gen networking. Scintil Photonics (February 17): heterogeneously integrated DWDM lasers for AI infrastructure. Xanadu (February 19): photonic quantum hardware. Salience Labs (February 25): optical circuit switches for data centers. Lightwave Logic (March 11): EO polymer modulators on PH18.
AI networking, DWDM lasers, quantum computing, optical circuit switching, advanced modulators. This is what it looks like when a foundry becomes a platform.
Tower is at OFC 2026 (March 17-19, LA Convention Center, booth #2221) the same week as GTC. The industry is also approaching the 200G-to-400G per lane inflection. FundaAI’s OFC preview frames this as a reshaping of modulation schemes, material platforms, and manufacturing capacity. At 400G, pure silicon modulators hit limits. The path forward is “silicon platform + heterogeneous materials” on mature SiPho wafers. OpenLight and Tower already demonstrated 400G/lane IMDD on Tower’s 300mm PH18DA at OFC 2025. Tower isn’t just positioned for 1.6T. It’s the foundry platform for 3.2T and beyond.
Meanwhile, Citrini Research published an optics basket this week that Irrational Analysis called “80% correct.” FundaAI AI followed with a CPO supply chain deep dive. The optics community is converging on the same questions this post addresses: who builds the foundry layer, who owns the capacity, and who gets left behind when 400G per lane arrives.
The Intel Wildcard
Ellwanger disclosed that Intel has expressed its intention not to perform under the September 2023 FAB11X agreement. The parties are in mediation. Tower is redirecting customer flows to Fab 7 in Japan, and the $920 million capex plan appears designed to absorb demand originally destined for FAB11X. If mediation results in a favorable outcome, that’s upside not in current estimates.
The Financial Trajectory
Tower’s 2028 model targets $2.84 billion in revenue and $750 million in net profit, nearly doubling from 2025.
FundaAI estimates SiPho revenue leaping from $228 million (2025) to approximately $690 million (2026) to $1.46 billion (2027), at which point SiPho would represent roughly 50% of total revenue. These are third-party projections, not company guidance, and depend on the capacity ramp executing on schedule.
The money path: SiPho capacity ramp → mix shift from 15% to ~50% of revenue → gross margins expand from 23% to approximately 45% → operating margins from 12% to approximately 37% → EPS roughly quadruples from $2.28 to approximately $8.21 by 2027. That’s the same kind of margin inflection that took Lumentum’s operating margins from 7.9% to 25.2% in a single year. The difference: Tower’s ramp is backed by customer prepayments, not projections.
Tower is also repurposing underutilized CMOS Image Sensor capacity for SiPho, lowering capital intensity by converting existing lines rather than building from scratch.
Q1 2026 guidance of $412 million (±5%) is likely the cyclical trough, driven by equipment calibration at the new Israel facility. Revenue should accelerate through H2 2026 as new capacity comes online.
So What?
Tower Semiconductor is the likely foundry chokepoint for the 1.6T optical interconnect buildout. $920 million in capex. 70%+ of capacity pre-booked through 2028. An NVIDIA strategic partnership. The only open-platform SiPho foundry at scale outside TSMC.
The bear case, honestly stated: TSMC’s COUPE could compress Tower’s economics faster than expected. The “pre-booked” capacity may include reservations that are partially flexible rather than fully committed take-or-pay. Customer concentration is a real risk. Value could migrate from the foundry layer toward integration and packaging, where TSMC has overwhelming advantages. And 26.8% gross margins today are a long way from the projected 45%.
What to watch at GTC and OFC: NVIDIA updates on the Tower partnership scope and CPO timelines. Tower’s booth #2221 demos. Broadcom clarity on CPO timing. Any hyperscaler signal on Camp 1 vs. Camp 2.
What would falsify it: TSMC dedicating SiPho capacity for non-COUPE customers. A major Tower customer defecting. The 400G per lane transition stalling. Or the capacity ramp missing its year-end 2026 target.
The constraint defines the architecture. We’ve applied this principle to memory bandwidth, to CoWoS packaging, to verification infrastructure. The binding constraint on the 1.6T optical transition isn’t laser supply — Lumentum is expanding that. It isn’t demand (Credo’s 18% beat proves that). It’s foundry capacity for the silicon photonics chips at the center of every optical engine. Tower appears to own that constraint. And they’re spending $920 million to make sure it stays that way.
This is the supply chain layer that was missing from the original optical stack map. Now it’s on the board.
A note on the private market. Litrinium, a Mission Viejo-based company building signal integrity solutions for next-gen optical interconnects, is one private company worth watching. I’m also meeting with Ayar Labs management next month to discuss their optical chiplet roadmap and COUPE positioning. More to come.
Resources
FundaAI: “TSEM: SiPho Capacity Inflection Drives Multi-Fold Growth Cycle” (Mar 5, 2026)
Irrational Analysis: Citrini Optics Basket Comments (Mar 12, 2026)
Disclosure: I hold positions in NVDA, LITE, CRDO, and TSEM. This is not investment advice.
Hi Ben,
Thank you for the multi-layered insight on TSEM and of course the overall space. Is TSEM one of your picks here primarily because of the bottleneck or is it a multi-year holding? Assuming they hit their 2026 capacity ramp (which let's say is priced in), what current TSEM investors will be tracking is the competition (i.e. TSMC). Our terminal value and durability of the moat, as I see it, depends on several things.
Near-term is the temporary bridge risk, whether hyperscalers are only using Tower right now because TSMC's COUPE isn't fully ready, making Tower a temporary stopgap rather than a permanent architectural partner.
The packaging choke hold theory acknowledges that the ultimate power in semiconductors right now lies in advanced packaging (like TSMC's CoWoS and SoIC). The downside is primarily Tower's ability to survive if TSMC bundles its logic, SiPho, and packaging into an offer that hyperscalers simply cannot refuse on a cost-per-bit basis; you mention how Si-Pho is an after thought for TSMC. But as Jensen said, his engineers are 10x more efficient now and I would be surprised if TSMC isn't already full steam ahead on CPO, so maybe the risk is more in how quickly this happens?
Lastly, the bullish thesis models gross margins expanding from 23% to 45%. This question demands proof that those margins are defensible in a price war against a $700+ billion behemoth like TSMC, rather than just a byproduct of a temporary supply shortage. If TSEM is a 1 to 2 year play, the signposts for me shift a bit here versus something through let's say 2030.
It was really awesome how you were able to sit and chat with NVDA management at GTC. If somehow you were able to do the same with TSEM in the near future, I wonder regarding capital allocation and moat durability:
1. With the $920 million in CapEx committed to this ramp, how much of the 'pre-booked' capacity through 2028 consists of hard, take-or-pay contracts versus soft reservations that customers could walk away from if a cheaper, integrated TSMC solution comes online faster than expected.
2. Broadcom and NVIDIA are currently utilizing Tower's open ecosystem. At what specific bandwidth threshold (e.g., beyond 3.2T) does the physics of 3D heterogeneous integration make an 'open platform' impossible, forcing customers into a closed, vertically integrated foundry like TSMC
The biggest things I struggle with here is framing the expectations when it comes to the market assigned multiple then of course how much each signpost should be worth. Hope this makes sense to you as I am a professional who is investing but not an investing (or tech) professional.