The Physics Problem: Why Copper Can’t Keep Up
Every AI training cluster runs on data movement. The weights being updated during backpropagation, the activations flowing between layers, the gradients being synchronized across thousands of GPUs—all of this depends on moving massive amounts of data at speeds that would have seemed impossible a decade ago. And we have reached the point where the fundamental physics of copper interconnects is failing us.
This is not an engineering problem that can be solved with better materials or clever circuit design. It is a fundamental physics constraint rooted in the electromagnetic properties of copper conductors. As serial link speeds push beyond 112 Gbps per lane toward 224 Gbps, copper traces on PCBs face catastrophic insertion loss that no amount of signal conditioning can overcome economically.
The math is brutal: At 224G PAM4 signaling, copper can reliably transmit signals only about 3 inches on a standard PCB. Yet modern AI racks need to connect components across 2-3 feet or more. The gap between what physics allows and what systems require has become unbridgeable with electrical interconnects alone.
The figure above, adapted from Qualcomm’s optical interconnect research, illustrates this fundamental tradeoff. The yellow diagonal represents copper’s degradation curve: as bandwidth density increases (moving up the Y-axis), the maximum achievable distance decreases (moving left on the X-axis). Technologies must position themselves above this line to be viable. Optical solutions—from μLEDs and optical chiplets in the “In-Package” zone to silicon photonics CPO in the “Off-Board” zone—all sit comfortably above the copper constraint line, explaining why the industry’s optical transition is physics-driven rather than merely economic.
The Optical Solution: Light Doesn’t Care About Distance
Photons do not experience electrical resistance. They do not create electromagnetic interference. They do not care whether they travel 3 inches or 300 meters—the signal quality remains pristine. This fundamental advantage makes optical interconnects the inevitable solution for AI-scale bandwidth requirements.
The optical interconnect stack is rapidly evolving across multiple technology layers, each with distinct players and investment implications. Let me walk through this stack from the bottom up, as someone who has studied these technologies since my days working in Professor Yeshaiahu Fainman’s Ultrafast and Nanoscale Optics group at UC San Diego back in 2003-2004.
The Technology Stack: Layer by Layer
Layer 1: Laser Sources and Photonic Components
Every optical link begins with a laser. The dominant technology for datacenter applications is the distributed feedback (DFB) laser operating at 1310nm wavelength, optimized for single-mode fiber transmission. Companies like Lumentum (LITE) and Coherent (COHR) manufacture the indium phosphide laser chips that generate the light.
For co-packaged optics, external laser sources (ELS) are becoming critical. Rather than embedding lasers directly into optical engines (where heat from the switch ASIC can degrade laser performance and reliability), the industry is moving toward separating laser sources from the optical engines. Lumentum’s 400mW 1310nm DFB lasers are becoming the standard for CPO external laser sources.
Layer 2: Silicon Photonics Integration
Silicon photonics uses standard CMOS manufacturing processes to create optical components—modulators, waveguides, detectors—directly on silicon wafers. This enables massive cost reduction through semiconductor-style scaling and integration.
The key innovation enabling co-packaged optics is the micro-ring modulator (MRM), which NVIDIA developed in collaboration with TSMC. These tiny ring-shaped waveguides can modulate light at 200 Gbps per wavelength in an extremely compact footprint. NVIDIA’s optical engines pack multiple MRMs together with wavelength multiplexing to achieve 6.4 Tbps aggregate bandwidth per optical chiplet.
What makes this approach particularly elegant is the use of micro-ring resonators and wavelength division multiplexing—techniques I first encountered working in Professor Fainman’s lab at UC San Diego two decades ago. The fundamental physics hasn’t changed: you’re using interference patterns in ring-shaped waveguides to selectively modulate specific wavelengths of light. What has changed is the manufacturing precision enabled by CMOS foundry processes and the economic imperative created by AI’s bandwidth demands. Seeing these concepts I studied as an undergrad now deployed at hyperscale is a remarkable validation of how long the photonics research pipeline can be.
Broadcom (AVGO) has emerged as the clear leader in CPO deployment. Their Tomahawk 5-based “Bailly” CPO switch has been shipping to hyperscalers since 2024, with Meta deploying them at scale. In October 2025, Broadcom announced the Tomahawk 6 – Davisson, the industry’s first 102.4 Tbps Ethernet switch with co-packaged optics. The TH6-Davisson uses sixteen 6.4 Tbps Davisson optical engines built on TSMC’s COUPE (Compact Universal Photonic Engine) process, achieving a 70% reduction in optical interconnect power consumption—more than 3.5x lower than traditional pluggable solutions.
Layer 3: Transceivers and Active Electrical Cables
While CPO represents the future, the market today is dominated by pluggable optical transceivers. The technology evolution here is moving through several stages:
Traditional DSP-based Pluggables: The workhorses of current datacenters, consuming 15-25W per 800G module. Companies like Coherent, Lumentum, and Chinese suppliers like InnoLight dominate this market.
Linear Pluggable Optics (LPO): Eliminate the DSP for short-reach applications, reducing power to 8-12W per 800G module. Companies like Credo (CRDO) enable LPO with their low-power DSP and retimer chips.
Co-Packaged Optics (CPO): Integrate the optical engines directly onto the switch or GPU package, eliminating the pluggable module entirely. Power drops to approximately 3.5W per 800G port.
Layer 4: Retimers and Signal Conditioning
The unsung heroes of high-speed connectivity are retimer chips that regenerate degraded signals. As PCIe speeds increase from Gen5 (32 GT/s) to Gen6 (64 GT/s), retimers become essential for maintaining signal integrity across the physical distances inside servers.
Astera Labs (ALAB) dominates the PCIe/CXL retimer market with their Aries product family. Their Aries 6 retimers support PCIe 6.0 and CXL 3.0 at only 11W—critical for keeping thermal budgets manageable in AI servers packed with eight GPUs. Astera has approximately 80% market share in PCIe retimers for AI servers.
The company’s acquisition of aiXscale Photonics signals their expansion into optical interconnects, extending their reach from electrical retimers into the photonic domain as the electrical-optical boundary moves closer to the compute die.
NVIDIA’s CPO Strategy: The 2027 Rubin Ultra Inflection
NVIDIA has been developing co-packaged optics technology in partnership with TSMC for years. Their Spectrum-X Photonics and Quantum-X Photonics switches, announced at GTC 2025, represent their first commercial CPO products:
Quantum-X Photonics: 144 ports at 800G InfiniBand, expected availability H2 2025
Spectrum-X Photonics: 512 ports at 800G Ethernet (409.6 Tbps total), liquid-cooled, expected 2026
But here’s the really interesting thesis, derived from Goldman Sachs’ semiconductor research: NVIDIA is expected to incorporate CPO into scale-up networking (GPU-to-GPU via NVSwitch) for the 2027 Rubin Ultra generation.
This is a massive inflection point. Today, optical interconnects are used primarily for “scale-out” networking—connecting different racks across the datacenter. The “scale-up” domain—connecting GPUs within a rack via NVLink and NVSwitch—has remained firmly in the copper domain.
The Rubin Ultra system (NVL576 “Kyber”) is architected for 600kW per rack—an extraordinary power density that creates massive thermal challenges. At these power levels, every watt saved in networking can be redirected to additional compute. Moving NVSwitch connectivity to optical could save 15-25W per GPU’s worth of transceivers, multiplied across 144 GPU packages per rack.
More importantly, optical scale-up enables new rack architectures. With copper, NVLink reach constrains where GPUs can be physically placed relative to NVSwitch. Optical interconnects decouple compute placement from physical proximity, enabling denser, more flexible system designs.
The Competitive Landscape
The optical interconnect market is consolidating rapidly as large semiconductor companies recognize that photonics capabilities are strategically essential for AI infrastructure.
The Big Three in CPO
Broadcom (AVGO): Clear leader with three generations of CPO shipping. TH6-Davisson (102.4 Tbps) now sampling to hyperscalers. Vertical integration from switch ASICs to optical engines. Their TSMC COUPE-based approach has proven production-ready with millions of hours of field testing on TH5-Bailly.
NVIDIA: Vertically integrated from GPUs through NVSwitch to optical engines. Spectrum-X and Quantum-X Photonics switches in 2025-2026. The Rubin Ultra CPO integration in 2027 represents the scale-up inflection that could dramatically expand the optical TAM.
Marvell (MRVL): In December 2025, Marvell announced its blockbuster acquisition of Celestial AI for $3.25 billion in cash and stock, with potential earnouts to $5.5 billion if Celestial hits revenue milestones. This is the largest optical interconnect acquisition in the current AI cycle and signals Marvell’s aggressive move to compete with NVIDIA and Broadcom in photonic fabrics. Celestial’s “Photonic Fabric” technology enables high-bandwidth, low-latency optical connections directly into GPU packages—exactly what’s needed for scale-up connectivity. AWS VP Dave Brown stated that the acquisition will “help further accelerate optical scale-up innovation for next-generation AI deployments.” Marvell expects $500M annualized revenue from Celestial by late fiscal 2028, ramping to $1B by fiscal 2029.
Component Suppliers
Lumentum (LITE): Dominant in high-power DFB lasers for CPO external laser sources and coherent transceivers. 800G ZR+ modules for long-reach datacenter interconnect. Their indium phosphide expertise is irreplaceable in the optical supply chain.
Coherent (COHR): Full-stack optical capabilities from InP laser chips through silicon photonics to complete transceiver modules. Their 1.6T-DR8 transceivers with NVIDIA DSPs represent the next generation of pluggable optics.
Credo (CRDO): Enabling LPO adoption with low-power SerDes and DSP chips. Their HiWire active electrical cables extend copper reach for short connections. 224G PAM4 SerDes for 1.6T transceivers positions them well for the next speed transition.
Astera Labs (ALAB): 80%+ share in PCIe/CXL retimers for AI servers. aiXscale acquisition extends into optical. Aries 6 retimers critical for PCIe Gen6 deployments.
The transceiver market is brutally competitive, with Chinese suppliers like InnoLight and Eoptolink gaining share through aggressive pricing. Western suppliers differentiate on performance (longer reach, higher reliability) and strategic relationships. The shift to LPO and eventually CPO restructures this market—component suppliers gain at the expense of module assemblers.
Private Companies: The Startup Landscape
While the public market offers exposure through LITE, COHR, ALAB, CRDO, AVGO, and MRVL, some of the most innovative work is happening in private companies. The recent M&A activity—AMD acquiring Enosemi, Astera Labs acquiring aiXscale Photonics, and now Marvell’s $5.5B acquisition of Celestial AI—signals that large semiconductor companies view optical interconnect capabilities as strategically essential.
Optical Chiplets & Co-Packaged Optics Startups
Ayar Labs ($275M+ raised) is arguably the most advanced, with optical I/O chiplets designed for chip-to-chip interconnect. They’ve partnered with Intel and NVIDIA and are targeting deployment in AI accelerators where they can deliver bandwidth that electrical interconnects simply cannot match at acceptable power levels.
Lightmatter ($420M+ raised) is building both photonic AI accelerators and optical interconnects, with their “Passage” photonic fabric targeting the scale-up domain. Their approach uses photonics not just for communication but for computation itself.
Avicena ($75M+ raised) takes a different approach using micro-LEDs (μLEDs) rather than lasers for chip-to-chip optical interconnects. This technology could potentially offer lower power and cost than traditional laser-based approaches for short-reach applications—exactly what the Qualcomm FOM chart shows as the emerging “μLEDs / Optical Chiplets” zone.
M&A Signals Strategic Importance
The acquisition activity in this space tells the real story:
Marvell → Celestial AI ($3.25-5.5B): The largest optical interconnect deal of the AI era. Validates scale-up optical as a $10B+ addressable market. Celestial’s Photonic Fabric can be co-packaged vertically with high-power XPUs in 3D packages.
AMD → Enosemi: Optical I/O for chiplet connectivity. Validates that major GPU vendors see optical interconnects as essential for competitive AI accelerators.
Astera Labs → aiXscale Photonics: Extends ALAB’s reach from electrical retimers into the optical domain—a natural progression as the electrical-optical boundary moves closer to compute.
For public market investors, these acquisitions provide a roadmap: watch for further consolidation as companies seek to fill gaps in their optical capabilities. The remaining startups with production-ready silicon photonics or optical chiplet technology are likely acquisition targets.
Investment Implications: A Tiered Framework
Based on the technology analysis above, I see the optical interconnect investment opportunity in three tiers:
Tier 1: Pure-Play Optical (Highest Leverage)
Lumentum (LITE) and Coherent (COHR) offer the most direct exposure to optical interconnect growth. Every CPO switch, every coherent transceiver, every optical engine needs their laser sources. The risk is customer concentration and competition from integrated solutions.
Tier 2: Enabling Technologies
Astera Labs (ALAB) and Credo (CRDO) benefit from the electrical-to-optical transition through their retimer and SerDes products. As optical moves closer to compute, their products become essential for signal conditioning at the interfaces. Lower optical-specific exposure but strong positioning in the overall AI connectivity stack.
Tier 3: Integrated Players
Broadcom (AVGO) and Marvell (MRVL) offer diversified exposure through their switch ASIC and optical engine integration. The Celestial AI acquisition transforms Marvell’s positioning—they’re now a direct competitor to NVIDIA and Broadcom in scale-up optical fabrics. Lower pure-play leverage but reduced risk through diversification.
The Timeline
2025: 800G volume ramp, CPO hyperscaler deployments expand (Broadcom TH5-Bailly, TH6-Davisson sampling)
2026: 1.6T production begins, NVIDIA Spectrum-X Photonics ships, LPO adoption accelerates
2027: Rubin Ultra CPO inflection—first optical scale-up for GPU-to-GPU connectivity
2028+: Optical interposers, chip-to-chip photonics, Marvell/Celestial products at scale
Conclusion
The optical interconnect transition in AI datacenters is not a question of if, but when and how fast. The physics constraints are immutable—copper simply cannot deliver the bandwidth required for next-generation AI clusters at acceptable power levels. The Qualcomm FOM framework makes this crystal clear: every technology must position itself above the copper degradation line, and optical solutions are the only path forward at scale.
For investors, the key insight is that this is still early innings. While Broadcom’s TH6-Davisson and NVIDIA’s photonics switches mark the beginning of CPO commercialization, the real inflection comes in 2027 with scale-up optical integration. Marvell’s acquisition of Celestial AI for up to $5.5 billion—the largest optical deal of the AI era—validates the strategic importance and massive TAM expansion ahead.
The companies positioned to benefit are those with irreplaceable positions in the optical supply chain: laser sources (LITE, COHR), silicon photonics platforms (AVGO, MRVL), and enabling components (ALAB, CRDO). The risk is that vertically integrated players like NVIDIA capture more of the value chain internally—but even NVIDIA needs external laser sources and packaging partners.
This is a structural shift in datacenter architecture driven by fundamental physics. Position accordingly.
Disclosure: The author holds positions in NVDA, CRDO, LITE, and ALAB. This article is for informational purposes only and should not be considered investment advice.
About the Author
Ben Pouladian is a tech investor and AI infrastructure analyst based in Los Angeles. He brings a unique perspective to semiconductor analysis through his electrical engineering background from UC San Diego (2004), where he worked in Professor Yeshaiahu Fainman’s Ultrafast and Nanoscale Optics group studying micro-ring resonators and silicon photonics. Ben co-founded Deco Lighting in 2005, which he grew into a national LED lighting manufacturer before transitioning to focus on technology investing. He currently serves as CEO of BEP Holdings and Chairman of the Terasaki Institute Leadership Board. Follow his research at benpouladian.com and on Twitter @benitoz.
Figure from Vikram Sekar
Excellent technical breakdown, especially the Qualcomm FOM framework making copper's physics wall totally clear. The 2027 Rubin Ultra scale-up inflection is the real thesis here, moving optics from rack-to-rack into GPU-toGPU changes the entire TAM. Marvell's $5.5B Celestial bet validates the value capture potential, but the question is whether NVDA keeps most of the CPO benefit in-house or creates real opening for suppliers like LITE and COHR at scale.